An MRAM cell typically includes a magnetic storage element, for example, a magnetic tunnel junction (MTJ) device, for storing a bit of information represented by two stable states in which the memory cell can reside. While semiconductor process technology, such as, for example, complementary metal-oxide-semiconductor (CMOS) technology, used to fabricate MRAM cells continues to scale aggressively below 0.18 micron (μm) dimensions, conventional MTJ devices often encounter difficulties due at least in part to a super-paramagnetic effect. The super-paramagnetic effect generally arises from the basic principles of thermal dynamics and is related to the total magnetic moment per bit, the switching field, and the temperature of the MTJ device in storage or operation.
When an energy barrier between the two stable states of the MRAM cell (often defined as the product of the total magnetic moment and the switching field associated with the device) is not much larger than the thermal energy per single degree of freedom kT, where k is Boltzman's constant and T is temperature in degrees Kelvin, the thermal energy could spontaneously switch the state of the memory cell without any external excitation (e.g., magnetic field). This may cause the information stored in the MRAM to randomize over time, thus undesirably affecting the data integrity of the MRAM. The requirement of maintaining an adequately large total magnetic moment for a given MRAM cell in order to avoid spontaneous switching is in direct contradiction with the trend to scale down the size of the MRAM cell and switching field.
There exists a need, therefore, in the field of MRAM for an architecture for implementing a magnetic memory cell which provides increased memory cell density without suffering from the above-noted deficiencies associated with conventional magnetic memory cells.